1. Field of the Invention
The present invention relates to a plasma display panel driving circuit, as well as plasma display apparatus, used for wall-mounted television sets and large-screen monitors.
2. Related Art
An alternating-current surface discharge type plasma display panel (hereinafter called “PDP”) as a typical AC type is constituted by arranging a front plate containing a glass substrate formed by disposing a scan electrode and a sustain electrode which carry out surface discharge and a back plate containing a glass substrate formed by disposing data electrodes oppositely in parallel so that both electrodes set up a matrix and that a discharge space is formed in a gap, and by sealing the perimeter portion with sealing materials such as glass frit. Between both substrates of the front plate and the back plate, discharge cells divided by bulkheads area provided, and in a cell space between these bulkheads, a phosphor layer is formed. In the PDP of such configuration, ultraviolet rays are generated by gas discharge, and with these ultraviolet rays, phosphors of red (R), green (G), and blue (B) colors are excited to emit light, thereby achieving a color display.
In such plasma display apparatus, various techniques are proposed for saving the power consumption.
For example, a so-called electric power recovery circuit is proposed, that is, in consideration that the PDP is a capacitive load, an inductor is included in component elements of a resonance circuit, and the inductor and the capacity load of the PDP are resonated in LC, the electric power accumulated in the capacity load of the PDP is recovered in a capacitor for power recovery, and the recovered power is reused for driving the PDP (see, for example, patent document 1).
In this technique, the electric power recovered from the PDP can be reused in sustain pulse voltage to scanning electrode and sustain electrode in sustain period, and the power consumed in sustain period is saved, so that the power consumption can be reduced.
That is, in the sustain period generating circuit, a resonance circuit having an inductor, or an electric power recovery circuit is installed. The electric power accumulated in the capacitive load of the PDP (the capacitive load generated in the scanning electrode) is recovered, and the recovered electric power is reused as driving power of scanning electrode, and the power consumption is saved. In the sustain pulse generating circuit, a power recovery circuit is provided. Hence, the electric power accumulated in the capacitive load of the PDP (capacitive load generated in the sustain electrode) is recovered, and the recovered power is reused as driving power of sustain electrode, and the power consumption is saved.
The power recovery circuit recovers and supplies electric power by LC resonance between the capacity load of PDP and recovery inductor by using the recovery inductor of inductance element. When recovering the electric power, the electric power accumulated in the capacitive load generated in the scanning electrode is moved to the recovery capacitor by way of a counterflow preventive diode and a switching element. When supplying the electric power, the electric power accumulated in the recovery capacitor is supplied to the PDP by way of the counterflow preventive diode and switching element. Thus, the scanning electrode of PDP is driven in sustain period. Therefore, in the power recovery circuit, without supply of electric power from the power source in sustain period, the scanning electrode is driven by LC resonance, so that the power consumption is theoretically zero.
The above operation of recovery circuit is assumed without consideration of parasitic components of diode or wiring. To be precise, operation of recovery circuit is influenced by various parasitic components, such as parasitic capacity component parallel between drain terminal and source terminal of switching element, or anode terminal and cathode terminal of diode element, and parasitic inductance component in series to the pattern portion wiring between elements.
Effects of such parasitic components are serious problems when the diode element is switched from ON to OFF state. In recovery operation, the resonance current flows, but when the counterflow preventive diode is changed from ON to OFF, a reverse current due to parasitic capacity of diode flows (which is called recovery current).
By this recovery current, energy is accumulated in the recovery inductor, and when the counterflow preventive diode is completely turned off, the product of inductance value of recovery inductor and time change value of recovery current becomes a surge voltage, which is generated in the recovery inductor terminal.
This surge voltage is applied to the counterflow preventive diode, and the withstand voltage of the counterflow preventive diode is required to have a sufficient allowance more than the surge voltage as compared with the actual working voltage.
To solve this problem, it is proposed to use a protective diode element in the recovery circuit (see, for example, patent document 2). FIG. 14 shows its configuration. In the diagram, the recovery circuit includes recovery capacitor Cr, recovery switches Q3, Q4, counterflow preventive diodes D3, D4, recovery inductors L1, L2, and protective diodes D105, D106. Switching elements Q1, Q2 constitute a sustain circuit for supplying sustain voltage Vsus. To simplify the explanation, in FIG. 14, only the portion relating to recovery operation is described out of the configuration of scan circuit and sustain circuit. FIG. 14 is a circuit diagram for explaining the operation when the sustain circuit is grounded.
At the time of generating a surge voltage in the counterflow preventive diode D3, the protective diode D105 conducts, and the energy accumulated in the inductor L1 is consumed in the channel of inductor L1 to protective diode D105 to switching element Q1, and thereby generation of surge is suppressed.
Similarly at the time of generating a surge voltage in the counterflow preventive diode D4, the protective diode D106 conducts, and the energy accumulated in the inductor L2 is consumed in the channel of inductor L2 to switching element Q2 to protective diode D106, and thereby generation of surge is suppressed.
Patent document 1: Japanese Patent Publication No. 7-109542
Patent document 2: Japanese Patent No. 3369535
The above explanation refers to an operation not in consideration of parasitic inductance component of wiring. Actually, as shown in FIG. 14, parasitic inductance components L3 to L6 present in the wiring between recovery switches Q3, Q4 and counterflow preventive diodes D3, D4. In the conventional circuit, therefore, surge absorbing effect is not obtained in parasitic inductance components (L3 to L6).
Actually, due to effects of parasitic inductance components, a surge voltage is generated between terminals of counterflow preventive diode, and the required withstand voltage for counterflow preventive diode is raised. Elevation of withstand voltage between terminals leads to increase of semiconductor element loss of recovery circuit such as increase of forward voltage drop and decline of switching speed. To reduce the parasitic inductance, it is desired to increase the thickness and shorten the distance of wiring pattern.
In configuration of semiconductor elements, there are various limits from the aspects of substrate area, heat releasing efficiency of cooling plates for fixing semiconductor elements, and others, and it is practically next to impossible to design thick and short wiring pattern while satisfying these limits, and it has been difficult to keep the parasitic inductance always at low level.
In the prior art, as described herein, a higher withstand voltage is required in the semiconductor elements of recovery circuit when driving the PDP, and the loss of semiconductor elements is increased, and hence the recovery efficiency drops. Moreover, since the loss of semiconductor elements is increased, a plurality of semiconductor elements must be connected in parallel, which causes to increase the cost and increase the mounting area.
The invention is devised in the light of these problems, and it is hence an object thereof to present a PDP driving circuit capable of reducing the mounting area and enhancing the recovery efficiency by lowering the withstand voltage of the counterflow preventive diodes and protective diodes in the power recovery circuit, and thereby curtaining the number of component elements, and a plasma display apparatus using the same.